![](https://cos-cdn.shuashuati.com/pipixue-wap/2020-1230-1107-56/ti_inject-812ce.png)
用元件例化语句描述下面的原理图 libriary ieee; USE ieee.std_logic_1164.ALL; ENTITY yf4 IS PORT( A,B,C,D: IN std_logic; Z: OUT std_logic); END yf4; ARCHITECTURE a OF yf4 IS PORT (A1,B1: IN std_logic; C1: OUT std_logic); BEGIN U1:yf2 PORT MAP (A,B,X); U3:yf2 PORT MAP (A1 => X, C1=>Z, B1 => Y); END a;