在下面横线上填上合适的语句,完成数据选择器的设计。 library ieee; use ieee.std_logic_1164.all; entity mux16is port( d0,d1, d2, d3 ,d4: in std_logic_vector(15 downto 0); sel: in std_logic_ve ctor(______downto 0); y: out std_logic_vector(_____ 、______0)); end; architecture one of mux16 is begin with_______ 、_______ y <= d0 when"000", d1 when "001", d2 when "010", d3 when “011” ; d4 when others ; end;